Power Optimization and modeling Engineer – AI Processor Full-time

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SMTS SILICON DESIGN ENGINEER

Position Title:

SMTS – Power Optimization and modeling Engineer – AI Processor

Job Description:

Key responsibilities:

• Responsible for 3 main areas, 1. Power optimization, 2. Power modeling and 3. Power correlation of cutting-edge IPs/Subsystem/SoCs across AMD family of products.
• Run power tools like PowerArtist and Primetime PX (PTPX) on various IPs/SoC.
• Review power reports and identify the outliers to debug the root cause of high-power consumption blocks.
• Recommend fixes and enhancements in Architecture and RTL design to reduce power.
• Provide feedback to IP teams to drive power optimization efforts throughout the project.
• Come up with bottoms-up estimate and top-down target for new IP/SubSystem/SoC
• Should be a team player, eagerness to learn new technology in low power space.
• Wherever possible come up with a new/innovative flow to simplify existing data (area vs signal-activity vs dynamic power etc..) to improve power projections.

Preferred Experience:

• Familiarity with low power/power optimization concepts in front-end and back-end design
• Familiarity with Verdi, PowerArtist tool and PrimetimePX(PTPX) tool.

ACADEMIC CREDENTIALS:

• MS degree in Computer Science, Software Engineering, Electrical Engineering, Integrated Circuit Engineering or an equivalent
• More than 10 years of experience in design in digital ASIC chips. knowledge on CPU, GPU, network, Video/audio, router, communication or advanced and complex chips.

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