FY25 Intern – Low-Power AI, Audio, and Sensors Subsystem Engineering Full-time

Company:
Qualcomm Canada ULC

Job Area:
Interns Group, Interns Group > Interim Engineering Intern – HW

Qualcomm Overview:

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age – and this is where you come in.

General Summary:

The low-power AI, Audio, and Sensors Subsystem is at the heart of nearly every product that Qualcomm delivers, enabling our devices to hear, see, sense, and interact with the world around you, through an intelligent HW ecosystem that enables lightning-fast response times (i.e. “Ok Google”), while maintaining ultra-low power and area footprint

Ubiquitous across Qualcomm’s vast product lines from our Snapdragon Mobile processors to Wearable technology including Smart Watches, Smart Glasses, AR, VR headsets, ultra-portable Bluetooth and personal assistants and a host of Automotive Infotainment, telematics and ADAS solutions.

The LPAI /HPASS team designs, verifies and implements both Low-Power and High-Performance sub-systems that fuse audio, sensors, camera and other inputs with AI acceleration to deliver ultra-low power, always-on, context-aware and intelligent functionality to all of Qualcomm’s ASICs.

As an ultra-low power subsystem, we innovate by enabling new functionality and use cases and optimizing for power with scalable performance for the Mobile, IOT, Wearables and AR/VR market.

Similarly, our High-Performance AI and Audio Subsystem ( HPASS) fuses the same compelling IPs into HW solutions designed for Autonomous Driving ( ADAS ), In-vehicle-infotainment and Telematics

As an intern on our team, you will work closely with an experienced engineer and contribute hands-on to design, verification, and modelling of ASIC HW IP (blocks) and sub-systems and learn a wide range of leading edge low-power and multi-power domain hardware design and verification techniques. We are looking for bright, energetic, motivated students to join our dynamic team as a Qualcomm Canada 2024/25 intern!

Minimum Qualifications:

• In study towards a bachelors in one of the following: Electrical Engineering, Computer Engineering, Computer Science or related field . Must have a minimum of one semester of university remaining after the internship concludes. Cannot be graduating before internship begins.

• Knowledge of a programming language and scripting. Preferably some experience with lab equipment – scopes, etc. School projects with FPGAs a nice to have.
• Good communication skills, Teamwork and organizational skills
• Object Oriented Programming (OOP), C, C++, Digital Circuits
• Computer Hardware (Caches, Busses, Memories, Clocking)

Preferred Qualifications:

• UVM, SVTB, System Verilog
• I2S/PCM Protocols
• Mathematics for Machine Learning (Algebra and Geometry )
• Relevant courses in Digital Signal Processing, Digital Filters
• Familiar with Embedded systems and interconnects
• Familiar with perforce and other software development tools
• FPGA fundamentals
• Familiar with Python

Successful candidates will gain experience in one of the following project areas:

For LPAI/HPASS ASIC Design and Implementation, Key Responsibilities/Exposures include:

• Contribute to RTL (Verilog) design for next generation Snapdragon Display Processors.
• Integration of external IP’s and design of interfacing logic into the Display Subsystem.
• Work with the latest sub-micron technology nodes.
• Use industry standard CAD tools for RTL Linting, power analysis, and CDC Analysis. Develop a strong foundation in good digital design practices.
• Participate in experiments to optimize the Display design across power, area, and performance targets.
• Using scripting languages (python) to enhance existing methodologies, automate manual processes, and devise new tools for design development.

For LPAI/HPASS ASIC Design Verification Intern, Key Responsibilities are/Exposures include:

• Own IP core level feature verification during the design and development phase of next generation ASICs through C/RTL and Gate Level simulations.
• Learn and get in-depth experiences with Display technologies and advance verification methodology and tools
• Participate in test plan development and execution and verification closure in conjunction with the ASIC teams.
• Contribute to creating/maintaining a test bench, assertions, and functional coverage models.
• Contribute to implementing flows to automate development processes.
• Participate in debug activities throughout the development cycle.
• Explore the capabilities of our simulation tools to help improve our DV workflow and simulation performance.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm’s toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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If you would like more information about this role, please contact Qualcomm Careers.