Doctoral Thesis: Detection and Recovery Mechanisms for Analog Edge AI Full-time

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We are looking for two PhD candidates within the “TIRAMISU” project (Training and Innovation in Reliable and Efficient Chip Design for Edge AI), which will be funded by the Marie Skłodowska-Curie Actions (MSCA) Doctoral Networks/Industrial Doctorates (DN-ID) in 2023, as part of the European Union’s EU Framework Programme for Research and Innovation Horizon Europe.
This thesis aims to develop detection and recovery mechanisms for analog devices in edge AI hardware. It will evaluate mechanisms that can be integrated into analog edge AI platforms to improve their reliability and safety. Due to the different nature of analog circuits, the intended solutions for digital edge AI platforms (DC1.4) cannot usually be reused, except for passing deviation information to higher-level functionalities. In-field mechanisms that can detect or compensate for relevant deviations of circuit-specific parameters or performances will be developed. Similar to DC1.4, mechanisms to stress the analog hardware or emulate relevant stress will be implemented to enable verification of the developed assessment methods.
The thesis will be written in cooperation with Taltech University and under the supervision of professor Maksim Jenihhin.

The tasks within the thesis will consist of:

• Development of low/zero overhead mechanisms that can be integrated in digital edge AI platforms in order to improve the overall reliability and safety
• Investigation of dedicated mechanisms to facilitate the evaluation and the assessment of hardware health, e.g., the number of occurred bit-flips or wrong computation results
• Exploration of in-field, run-time monitoring techniques of hardware health, and mechanisms to collect error measurements by using functional communication units, e.g. on-chip busses for system evaluations
• Development of schemes to ensure reliability by design and by activating in-field mechanisms which ensure the intended functionality or recover the hardware
• Implementation of mechanisms to stress the hardware or to emulate a relevant stress to enable a thorough verification of the various assessment methods for the hardware health
• Evaluation of these solutions on real chips and under stress of atomic particles

Your Profile:

A doctoral student is a research enthusiast,
› …whose interests are scientific research combined with the passion for Infineon’s innovative products and applications.
› …who enjoys working in an industrial environment in combination with an Infineon partner university.
› …who appreciates open communication and the contribution of an international environment.
› …and is thus an excellent candidate for a further academic or industrial career after completion of their thesis.

As the ideal candidate you:

• Have not been working or studying in Germany for more than 12 months in the last 36 months
• Are eligible for full-time PhD studies and have a master’s degree in Computer Engineering, Electrical Engineering or a related field with very good grades
• Are interested in complex, interdisciplinary and interlinked tasks and should like to solve them together with colleagues
• Possess good presentation skills, helping you to present challenging issues clearly and simply
• Gained first experience with metamodeling, (template-based) code generation and/or model-driven architecture
• Have knowledge in object-oriented programming with languages such as C++ and Python and embedded programming with C and/or Assembler
• Possess good knowledge of digital design and RTL modeling in VHDL and/or (System)Verilog and embedded system architectures
• Are interested in generation and recursive application of generation, e.g. generation of generators
• Possess very good language skills in English and ideally German

Please attach the following documents to your application:

• CV in English
• Cover Letter
• Latest grades transcript from univeristy

Contact:
Sophia Dechant

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