Design Verification Engineer, Silicon AI/ML, Google Cloud Full-time

Minimum qualifications:

• Bachelor’s degree in Electrical Engineering or equivalent practical experience.
• 8 years of experience with verification methodology such as UVM.
• 6 years of experience in the verification of IP designs such as IP, SoC, vector CPUs, etc.
• Experience with SystemVerilog, SVA, and functional coverage.

Preferred qualifications:

• Master’s degree in Electrical Engineering or a related field.
• Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
• Experience creating and using verification components and environments in standard verification methodology.
• Experience with ASIC standard interfaces and memory system architecture.
• Experience in verification of AI/ML Accelerators.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google’s most demanding AI/ML applications. You’ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google’s TPU. You’ll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will own the full verification life cycle, from verification planning and test execution to coverage closure, with an emphasis on meeting stringent AI/ML performance and accuracy targets. Build robust, constrained-random verification environments capable of exposing corner-case bugs and ensuring the reliability of Artificial Intelligence/Machine Learning (AI/ML) workloads on Tensor Processing Unit (TPU) hardware. You will collaborate closely with design and verification engineers in active projects and perform verification.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google’s product portfolio possible. We’re proud to be our engineers’ engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

• Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools. Develop cross-language tools and scalable verification methodologies.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.