AI/ML Silicon Emulation Engineer, TPU, Google Cloud Full-time

Minimum qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 5 years of experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug).
• Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C , Perspec, OS, or drivers.
• Experience with industry standard emulator technologies (e.g., HAPS, Zebu, Veloce, or Palladium) ranging from build tools to advanced capabilities (e.g. power aware emulation).
• Experience with execution and RTL/firmware/software debug on Hardware Emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., Xilinx, Altera).

Preferred qualifications:

• Experience in programming and scripting in C, C , Python, Perl, or TCL.
• Experience with EDA debug tools (e.g., Verdi, SimVision/Indago, GDB).
• Understanding of SoC architecture and interfaces (e.g., DDR, PCIe, etc.).
• Understanding of RTL to Emulation/FPGA flows including Emulation test benches (e.g., Transactors/Accelerated VIPs, Hybrid, In-circuit Emulation).

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google’s most demanding AI/ML applications. You’ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google’s TPU. You’ll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will help design, verify, and deploy Google Cloud TPU projects through emulation based prototyping. You will work directly with other emulation prototyping team members as well as designers, DV engineers, Silicon Validation engineers, and software teams to deliver emulation based prototyping capabilities for our AI/ML projects, including compiling projects, managing our prototyping platforms, debugging issues in infrastructure and design, assisting in the hardware and lab bring up and validation of our SoC systems.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google’s product portfolio possible. We’re proud to be our engineers’ engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

• Build full chip emulation and/or FPGA prototypes from complex SoC designs and deliver to multiple customers such as software, firmware, platform and post-silicon validation teams.
• Influence the design and verification teams to add emulation friendly model development.
• Bring up system level emulation models through reset, boot, and bare metal content or OS.
• Work with architects, designers, software engineers, pre- and post-silicon verification engineers to develop test plans, coverage, and reproduce failures on emulation.
• Develop, execute, and debug full-chip/system on a chip (SoC) tests on Emulation platforms. Explore new verification and emulation methodologies and implement them.